David Rodenas

Rooms renting search, based in Facebook social profile matching.
Architect and developer of a recommendation engine for real-time user matching. Used heuristics, clustering, advanced indexing, and in-memory techniques. Built a minimum viable engine in 15 days. New Facebook profile processed in less than 10 seconds, best user matches in less than 1 second. Target 1G attributes and 100T potential user matchings.
Technologies: Java, SparkJava, MySQL, Tomcat

Movie recommender benchmark to compare graph databases.
Developed and optimized versions for SQL and NoSQL. Used a proposed algorithm based in following relations to find similar recommenders. Able to compute recommendations in less than 0.1 seconds with arbitrary large databases.
Technologies: Java, MySQL, PostgreSQL, MongoDB, Neo4j, Movielens.

NoSQL graph database engine to fast process large volumes of relationships (joins).
Analyst and developer of the graph database core to add new functionalities and improve performance. Introduced advanced parallel techniques for high scalability. Achieved speedup in clusters and multi-core.

Tool to reduce the cost to analyze and solve defects in DB2.
Consulting for the creation of a DEX based tool. Meetings with the customer and evaluation with prototypes. Developed three proposals for future projects.

IBM, Philips, Nokia, STMicroelectronics, NXP, Silicon Hive (Barcelona, Eindhoven, Haifa).
Creation of a whole infrastructure to ease streaming programming for heterogeneous multi-core processors.
Researcher, coordinator and developer in programming models, compilers, and runtimes. Companies needs capturing and matching with BSC know how. Obtained an attractive framework, adopted for a period by AMD for its Fusion processor.

Four years project with collaboration of IBM.
Create a supercomputer with a capacity of 10 Petaflops, 100x times faster than the first Marenostrum.
Researcher and designer of the simulation infrastructure. Configurations analysis and parametrization of the SARC simulator. Collaborationship in the following Cell BE architecture.

IBM (Barcelona, Haifa)
Framework to create streaming programs for an IBM heterogeneous processor.
Researcher and designer of the architecture. Meetings and reviews of the progress of both teams. Stablished requirements to ensure success even for novice programmers.

Library for trace application generation for Paraver (graphic visualizer).
Mintaka designer and developer and IBM Cell BE consultant for the port MPItrace.
Built a lightweight library for parallel/cluster application tracing widely adopted by many teams. Full traced with success the first app in the Cell Processor (in v3, v5 was released within Playstation 3), including generic cores and accelerators.

IBM Watson, Philips, Thales, Xyratex, ARM (Barcelona, Eindhoven, Cambridge UK).
Modular customizable heterogenous processor simulator.
Researcher, designer, team leader, and developer of the simulator architecture. Coordination between more than 20 partners in the creation of the infrastructure. Created a modular simulator customized to many different architectures able to execute a large stack of programs.

Project started in the CEPBA IBM Research Institute.
Objective to improve the infrastructure of the SDSM (simulate a unique process space in a cluster) to allow multilevel parallelism and its impact over applications.
Researcher and developer of the middleware and applications performance.
Analysed the impact and improved the infrastructure without modifying applications.
Demonstrated that OpenMP multi-zone applications can run efficiently over a cluster without requiring the… Show more

Project started in the CEPBA IBM Research Institute.
Objective to improve the infrastructure of the SDSM (simulate a unique process space in a cluster) to allow multilevel parallelism and its impact over applications.
Researcher and developer of the middleware and applications performance.
Analysed the impact and improved the infrastructure without modifying applications.
Demonstrated that OpenMP multi-zone applications can run efficiently over a cluster without requiring the complexity of a MPI framework. Show less

Processor architecture able to be in the top 5 of Top500 supercomputers (top500.org).
Research processor architecture and port OpenMP tools to Cyclops architecture (generic multicore with 128 execution threads). Analysed processor stats and registers. Discovered an important bottleneck in the cache access and proposed two solutions to overcame with hardware limitations. Improved performance from speedups from 24x to more than 100x times faster.

Scholar European project of Performance Portability of OpenMP.
Obtain an OpenMP platform able to achieve performance in multiple architectures.
Researcher and developer in SDSM. Improved library and explored possibilities of SDSM. Traced and analysed tools, applications and its behaviours. Obtained hints that OpenMP multi-zone applications can achieve competitive results in clusters.

Aplicación Miltiplataforma HTML5/Cordova para gestionar visitas mediante reconocimiento OCR, Ldap con integración en AEOS